Tei Newman-Lehman

TNL Systems

Piezolith: power and cooling for AI hardware

Concept design, modeling and development · 2026–present

Modern AI processors face two tightly linked physical limits: feeding massive electrical power cleanly into a tiny chip package, and pulling the resulting heat back out before temperatures throttle performance. I started Piezolith to explore a unified hardware approach to both problems—developing the physics, manufacturing plan, intellectual property, and business case together.

CNC-machined copper micro-channel cold plate and anodized-aluminum manifold housing beside a silicon thermal test die on a ceramic substrate.Enlarge imageEnlarge: CNC-machined copper micro-channel cold plate and anodized-aluminum manifold housing beside a silicon thermal test die on a ceramic substrate.
Evaluating a new cooling concept for high-power AI hardware meant modeling coupled thermal and power-delivery limits before building a first physical test device. Illustrative image.

Understanding the customer’s problem

In an AI data center, power delivery and cooling aren’t just about lowering the monthly electric bill—they determine how much computing throughput an operator can extract from chips and racks they have already paid a fortune to deploy.

I mapped existing commercial solutions and competing academic research against what chipmakers and data-center operators actually require in production. High theoretical performance wouldn’t matter if the device couldn’t survive assembly tolerances, fit existing package footprints, or justify the switching cost.

Comparison between conventional off-chip magnetic voltage regulators and liquid cold plates (left) and an integrated CoWoS-L active interposer (right).Enlarge imageEnlarge: Comparison between conventional off-chip magnetic voltage regulators and liquid cold plates (left) and an integrated CoWoS-L active interposer (right).
Proposed package concept beside conventional power delivery and cooling. The efficiency figures are modeled targets, not demonstrated hardware results; the package is not currently shipping.

Testing the physics in software before entering the cleanroom

Hardware mistakes get expensive the moment you start fabricating wafers. Using technical literature, prior-art searches, and first-principles analysis, I worked through how heat and power move through the structure, how candidate materials behave across temperature swings, and where manufacturing could break down.

I then directed AI coding agents to build interactive engineering models and simulation tools so I could stress-test the design across adjustable operating conditions—auditing the underlying math, checking whether parameter sweeps behaved physically, and refining the comparisons until they isolated the exact thermal, material-compatibility, and fabrication questions that only a physical experiment can settle.

First-principles subsystem summary across PZT resonant power conversion, surface-acoustic-wave diamond microfluidics, and ferroelectric HZO power gating.Enlarge imageEnlarge: First-principles subsystem summary across PZT resonant power conversion, surface-acoustic-wave diamond microfluidics, and ferroelectric HZO power gating.
Proposed PZT power conversion, diamond microfluidic cooling and HZO power gating, explored through first-principles models. Physical validation remains ahead.

Building the IP and business strategy alongside the engineering

Rather than treating commercialization as an afterthought, I built the unit-cost and business models alongside the technical analysis and filed four provisional patent applications covering the core architecture.

I modeled sensitivity across technical performance, manufacturing cost, and pricing to compare two distinct paths to market: licensing the architecture to established semiconductor and cooling suppliers for faster adoption, versus supplying hardware directly to capture more value per unit while taking on manufacturing and qualification.

I am currently engaging prospective investors and working with a university nanofabrication facility to fabricate the first physical proof-of-concept test structures—using the simulation suite to guide cleanroom testing, where real-world performance now has to be proven.

Technology convergence timeline mapping GPU package power density against 48V rack distribution and back-end-of-line ferroelectric process maturity.Enlarge imageEnlarge: Technology convergence timeline mapping GPU package power density against 48V rack distribution and back-end-of-line ferroelectric process maturity.
Technology context for the proposed package: GPU power density, 48V rack distribution and ferroelectric process maturity. This is not a record of completed product milestones.

Experience used here

Market and customer research · Concept development · Technical diligence · Thermal engineering · Engineering modeling · AI-assisted analysis software · Intellectual-property development · Business planning · Prototype development

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